home *** CD-ROM | disk | FTP | other *** search
- AWARD Software Europe Elsenheimerstr. 50
- D-80687 Muenchen
- GERMANY
- Tel: 089 / 57 57 50
- Fax: 089 / 57 59 98
-
- ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
- AWARD POST Codes for BIOS V4.20 and V4.50
- ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
- Der Text unter "DESCRIPTION" basiert auf der von AWARD Software Europe
- freundlicherweise zur Verf?gung gestellte Beschreibung der durchgef?hrten
- Tests (POST procedures). Bitte beachten Sie, daá die Auflistung der Codes
- hier nicht (!) in numerischer Reihenfolge erfolgt, sondern dem Ablauf der
- Routinen w"hrend des POST entspricht. Codes in runden Klammern sind zum
- Teil OEM-spezifisch oder nur in einer Version 4.20 bzw. 4.50 verf?gbar.
- ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
-
- POSTcode / NAME DESCRIPTION
-
- 00 Reserved -
- (C0) Turn Off Chipset OEM specific cache control.
- Cache
- 01 Processor Test 1 Processor Status (IFLAGS) verification.
- Tests the following processor status
- flags: carry, zero, sign, overflow.
- The BIOS will set each of these flags,
- verify they are set, then turn each flag
- off and verify it is off.
-
- (CA) Processor test 1 Processor test 1 (s. a.) for fast boot.
- (very early init)
- 02 Processor Test 2 Test processor registers, Read/Write/
- Verify all CPU registers exept SS, SP and
- BP with data pattern FF and 00.
- 03 Initialize Chips Disable NMI, PIE, AIE, UIE, SQWV.
- Disable video, parity checking, DMA.
- Reset math coprozessor. Clear all page
- registers, CMOS shutdown byte.
- Initialize timer 0, 1 and 2; including set
- EISA timer to a known state.
- Initialize DMA controllers 0 and 1.
- Initialize interrupt controllers 0 and 1.
- Initialize EISA extended registers.
- 04 Test Memory Refresh RAM must be periodically refreshed in order
- Toggle to keep the memory from decaying. This
- function assures (by testing Port 0x61
- Bit 4) that the memory refresh is working
- properly.
- 05 Blank video Keyboard controller initialization.
- Initalize keyboard
- (06) EPROM Checksum Checksum BIOS EPROM, sign-on-message,
- (or reserved) evaluation-message and F000:E000 to
- F000:EFFF area.
- 07 Test CMOS Interface Verifies CMOS is working correctly,
- and Battery Status detects bad battery. Detects if CMOS
- override key (INSERT) is pressed.
- BE Chipset Default Program chipset registers with power on
- Initialization BIOS defaults.
- (C1) Memory presence test OEM specific Test to size onboard memory.
- (C5) Early Shadow OEM specific shadow enable for fast boot.
- (C6) Cache presence test External cache size detection.
- 08 Setup low memory Early chipset initialization (Code C2).
- Memory presence test.
- OEM chipset routines.
- Clear low 64K of memory.
- Test first 64K memory.
- 09 Early Cache (Cyrix CPU initialization,)
- Initialization Cache initialization.
- 0A Setup Interrupt Initialize first 120 interrupt vectors
- Vector Table with SPURIOS_INT_HDLR and initialize
- INT 00h-1Fh according to INT_TBL.
- 0B Test CMOS RAM Test CMOS checksum, if bad or INSERT-key
- Checksum is pressed, load defaults.
- 0C Initialize Keyboard Detect type of keyboard controller
- (optional). Set NUM_LOCK status.
- 0D Initialize Video Detect CPU clock. Read CMOS location 14h
- Interface to find out type of video in use.
- Initialize video adapter.
- 0E Test Video Memory Test video memory, write sign-on message
- to screen, setup screen for POST messages.
- Setup shadow RAM (enable shadow according
- to setup).
- 0F Test DMA contr. #0 BIOS checksum test.
- Keyboard detect and initialization.
- 10 Test DMA contr. #1 -
- 11 Test DMA Page reg. Test DMA Page registers.
- 12-13 Reserved -
- 14 Test Timer Ctr. 2 Test 8254 Timer 0 Counter 2.
- 15 Test 8259-1 Mask Verify 8259 Channel 1 masked interrupts
- Bits. by alternately turning off and on the
- interrupts lines.
- 16 Test 8259-2 Mask Verify 8259 Channel 2 masked interrupts
- Bits. by alternately turning off and on the
- interrupts lines.
- 17 Test Stuck 8259's Turn off interrupts, then verify
- Interrupt Bits no interrupt mask register is on.
-
- 18 Test 8259 Interrupt Force an interrupt and verify that
- Functionality the interrupt occurred.
- 19 Test Stuck NMI Bits Verify NMI can be cleared.
- (Parity/IO Check)
- 1A Display CPU clock -
- (Reserved in V2.00)
- 1B-1E Reserved -
- 1F Set EISA Mode If EISA non-volatile memory checksum is
- good, execute EISA initialization. If not,
- execute ISA tests and clear EISA mode flag.
- Test EISA Configuration Memory Integrity
- (checksum & communication interface).
- 20 Enable Slot #0 Initialize slot 0 (System Board).
- (EISA)
- 21-2F Enable Slots Initialize slots 1 through 15.
- #1 - 15 (EISA).
- 30 Size Base and Size base memory from 256K to 640K and
- Extented Memory Extented Memory above 1MB.
- 31 Test Base and Test base memory from 256K to 640K and
- Extented Memory Extented Memory above 1MB using various
- Patterns.
- ! NOTE: This will be skipped in EISA mode and can
- be "skipped" with ESC key in ISA mode.
- 32 Test EISA Extended If EISA mode flag is set then test EISA
- Memory (EISA) memory found during slots initialization.
- ! NOTE: This will be skipped in EISA mode and can
- be "skipped" with ESC key in ISA mode.
- (33) IDE auto detect OEM-specific detection of IDE parameters .
- (Reserved in V4.50)
- 34-3B Reserved.
- 3C Setup enabled. Enable to enter setup (show message
- on screen).
- 3D Initialize & Detect if mouse (PS/2) is present,
- Install Mouse initialize mouse aund install interrupt
- vectors. (V4.20: OEM specific.)
- 3E Setup Cache Initialize cache controller. If enabled in
- Controller setup, enable cache (internal & external).
- 3F Setup Shadow RAM. Enable shadow according to setup.
- (Reserved in V4.50)
- 40 Reserved. -
- BF Chipset Init. Program chipset registers with setup
- values.
- 41 Initialize Floppy Initialize floppy disk drive
- drive & controller controller and any drives.
- 42 Init. Hard disk Initialize hard disk drive
- drive & controller controller and any drives.
- 43 Detect & Init. Initialize any serial and parallel
- Ser./Par. Ports ports (also game port).
- 44 Reserved -
- 45 Detect & Init. Initialize math coprocessor.
- Math Coprocessor
- 46 Reserved.
- 47 Set speed for boot Chipset dependent speed switching
- (reserved in V4.50) routine (V4.20 only, Code C8).
- 48-4D Reserved.
- 4E Manufact. POST Loop Reboot if manufacturing post loop pin
- or Disp. Messages. (or Keyboard controller bit P15) is set
- Otherwise display any messages (i. e.
- any non-fatal errors that were detected
- during POST) and enter setup.
- 4F Security Check Ask password security (optional).
- 50 Write CMOS Write all CMOS values back to RAM,
- recalculate checksum and clear screeen.
- 51 Pre-boot Enable Enable parity checker. Enable NMI.
- Enable cache before boot.
- 52 Initialize Option Initialize any option ROMs present from
- ROMs 0xC8000h to 0xEFFFFh.
- ! NOTE: When FSCAN option is enabled, this step
- will initialize ROMs to 0xF7FFFh.
- 53 Initialize Time Initialize time value in 40h: BIOS area.
- Value
- 54-5F Reserved -
- 60 Setup Virus Setup virus protect according to setup
- Protect (optional).
- 61 Set Boot Speed Set system speed for boot.
- 62 Setup NumLock Setup NumLock status according to setup.
- 63 Boot Attempt Set low stack. Boot via INT 19h.
- (D0-DF) Debug Available POST codes for use by source
- code customers during development.
- B0 Spurious Int. If interrupt occurs in protected mode.
- B1 Unclaimed NMI If unmasked NMI occurs, display message
- "Press F1 to disable NMI, F2 reboot"
- E0 Reserved -
- E1-EF Setup pages (E1 = Page 1, E2 = Page 2, ...).
- FF Boot -
-
-
